1. Field of the Invention
The present invention relates to transmission line terminators that present the proper termination impedance to the transmission line, and more particularly relates to active circuit terminators wherein low power consumption is desired.
2. Background Art
As digital electronic circuits have become faster and faster, it has become recognized that the wires on memory, processor and other electronic cards behave like long transmission lines, where "long" is relative to the rise/fall transitions of pulses or waves incident on the transmission line. Such transmission lines commonly drive several receiver circuits distributed along the line, comprised entirely of MOSFETs and presenting a negligible capacitive load, and are open circuited at the far end. The open circuit at the far end results in reflections on the line that interfere with the operation of the receivers distributed along the line. (In this document, "near end" and "far end" of a transmission line refer to the end of the transmission line connected to a signal source and to the most distant point from the source, respectively.)
To minimize the effect of reflections, it has been common practice to limit the rise times of the line drivers, and to simply wait out the gradual damping of the reflections. This results in unacceptably long delays, undesirably lengthening the operating cycle times. Center tapped resistors between the plus voltage rail and ground, having a Thevenin equivalent impedance equal to that of the line can be used as a terminator to eliminate the reflections, but the resulting power dissipation penalty that this imposes on the driver chips has been considered unacceptable.
There have been several attempts to use active circuits to improve the termination characteristics without incurring a power penalty. These approaches have generally fallen into three categories.
The first type of approach involves the use of a pair of forward biased diodes connected between the plus rail and ground, using the center tap as an approximation for the line impedance, Z0. The diodes may be made as FET transistors, with the gates connected to their drains. Examples of this approach can be found in IBM Technical Disclosure Bulletin ("TDB"), Vol. 32, No. 4A, Sep. 1989, pp. 393-395 entitled "Active Terminators for CMOS Drivers," and in IBM TDB, Vol. 20, No. 12, May 1978, pp. 5192-5193, entitled "Low Power Dissipation Push-Pull Driver".
This approach represents a tradeoff between two undesirable conditions. Since the diodes are always forward biased, there is always standing power. To more nearly approximate Z0, and thereby reduce the magnitude of the reflections, requires more power. On the other hand, reducing the power degrades the impedance match between the terminator and the line, thus increasing the magnitude of the reflections.
The second type of approach involves the use of a level sensitive receiver to sense the transition of the incident wave at the far end of the transmission line, and to develop turn-on signals which can turn on transistor switches between the appropriate power rail and the transmission line. The switches may use their dynamic channel impedance, or they may switch in resistors whose values can be chosen to terminate the transmission line. This catagory can be further subdivided into two subcatagories. The first involves steady state termination. Examples of this can be found in U.S. Pat. No. 4,859,877, which issued on Aug. 22, 1989 to Cooperman, et al., entitled "Bidirectional Digital Signal Transmission System," and in IBM TDB Vol. 28, No. 10, Mar. 1986, pp. 4268-4269, entitled "Active Terminator for Transmission Line". The second subcatagory involves transient termination only. An example of that can be found in IBM TDB Vol. 30, No. 7, Dec., 1987, pp. 393-395, entitled "Transient Terminator for Transmission Lines."
The approaches presented in these subcatagories, both have limitations. Both use a level sensitive detector to determine when to switch the terminating impedance across the line. Thus, the termination is applied some delay after the input transition crosses some design threshold. In Cooperman there may be six stages of delay before the decision is made to change the terminating polarity. In the IBM TDB Vol. 28, No. 10, article there are two stages of delay. As a result of this delay, the change of terminating polarity happens late, resulting in additional reflections. Both of these references claim to achieve zero steady state power, but the time to reach steady state during transitions is greater than desired. The Cooperman patent also implies clocking the time in which the determination is active.
The IBM TDB Vol. 30, No. 7, article also suffers from the delay in detecting the time at which the incident wave crosses a threshold. In addition, it uses the channel impedance of two transistors to approximate Z0, but the two transistors are conducting only for a transient period determined by a delay line. As a consequence, the termination circuit serves only to limit the duration of over-shoot.
The third type of approach uses capacitive coupling for transient cut-off. An example of this type can be found in IBM TDB, Vol. 19, No. 10, Mar. 1977, p. 3745, entitled "Dynamic Active Terminator Circuit." According to this approach, a capacitor couples current to the base of a bipolar transistor during a positive-going transition, which drives the transistor for a period of time determined by the capacitor and an associated resistor, placing into the circuit for such period of time a termination resistor. This approach suffers from the lag effect of the capacitive coupling and only operates on positive-going transitions.
Numerous disclosures can be found in the prior art of various types of circuits that are intended for placement at the receiving end of logic circuits, but which do not address the problem of providing proper termination impedance to a transmission line. For example, IBM TDB Vol. 32, No. 10B, Mar. 1990, pp. 272-273, entitled "Tri-State Driver with Integrated Hold Circuit," discloses as prior art the use of a latch in connection with tri-state drivers. The latch is intended to hold receiver input levels in the high impedance state of the tri-state driver at a "0" or "1" level, preventing the receiver input from drifting to an arbitrary level. The reference recommends placing the latch closely proximate the tri-state driver to perform its voltage hold function, rather than with a receiver, citing the hysteresis delay effect of the latch as being beneficially removed by the elimination of the latch at the receiver. This reference teaches nothing of transmission line termination or impedance matching.
Another type of circuit is the flow-through, or fall-through, latch, such as that disclosed in IBM TDB, Vol. 32, No. 12, May 1990, pp. 389-392, entitled "On-Chip Receiver Featuring Fall-Through Radiation-Hardened Latching." This reference points out that latches have been used in connection with VLSI chip inputs, particularly in memory applications, to aid in interleaving in system environments. The reference goes on to propose a technique for radiation-hardening such latches to prevent unwanted latch switching from incident radiation by provision of resistance internal to the latch to integrate out the short electrical pulses that can be generated by such radiation, so as to prevent such unwanted switching. The reference teaches nothing of transmission line termination or impedance matching.
A still further type of circuit is the undershoot/overshoot clamp or damper. Examples of this can be found in the following U.S. Pat. No. 5,103,118, which issued on Apr. 7, 1992, to C.M. Peterson, entitled "High Speed Anti-Undershoot and Anti-Overshoot Circuit," U.S. Pat. No. 4,970,419 which issued on Nov. 13, 1990, to T. P. Hagen, et al., entitled "Low-Noise Transmission Line Termination Circuitry," U.S. Pat. No. 4,943,739, which issued on Jul. 24, 1990, to G.G. Slaughter, entitled "Non-Reflecting Transmiqsimn Line Termination," and U.S. Pat. No. 4,015,147, which issued on Mar. 29, 1977, to E.E. Davidson, et al., entitled "Low Power Transmission Line Terminator".
Accordingly, it is an object of the invention to provide a transmission line terminator that dissipates substantially zero steady state power.
It is a further object of the invention to provide such a terminator that presents a very good impedance match with the transmission line so as to minimize reflections on the transmission lines.
It is a still further object of the invention to provide such a terminator for a transmission line comprised of a minimal number of circuit devices so as to provide an efficient implementation.
These and other objects and features are achieved by the present invention as will now be described.